The invention relates generally to frequency channel communications and, more particularly, to attenuation of undesired frequencies in frequency channel communications.
In communications applications that utilize frequency channels, for example, wireless and wired RF communications, the energy in the desired frequency channel can be much lower than the energy in adjacent, undesired frequency channels. Accordingly, in order to extract communication signals from the desired frequency channel, communication receiver architectures must address the interference caused by adjacent frequency channels, particularly those of higher energy than the desired frequency channel.
Some conventional RF receiver architectures, such as super-heterodyne and direct conversion architectures, utilize high xe2x80x9cQxe2x80x9d band-pass SAW filters (channel select filters) to attenuate the interferers. Such filters produce a relatively clean channel signal that can then be converted to digital format using conventional low-resolution analog-to-digital converters (ADCs). However, these filters are typically ceramic or crystal electromechanical filters which are disadvantageously large and costly, and which impose an undesirably large signal power loss.
In highly integrated communication systems, direct conversion architectures are typically preferred because they permit elimination of SAW filters and hence component count reduction. These architectures also permit the desired channel selection to be performed in the digital domain using digital filters. An exemplary direct conversion architecture is illustrated diagrammatically in FIG. 1. The RF communication signal is mixed down at 11, and applied to an anti-aliasing filter at 13. The output of the anti-aliasing filter 13 is applied to a high frequency analog-to-digital converter (e.g., a xcex94xcexa3 modulator) 15. The analog-to-digital converter (ADC) works at a selected sampling rate to digitize the entire frequency band including the interferers. The interferers are then attenuated by digital filtering at 17. The respective signal outputs from each of the components 11, 13, 15 and 17 are also graphically illustrated in FIG. 1.
Direct conversion architectures provide high integration capability by trading off analog filter complexity (eliminating the external analog SAW filter) for increases in the oversampling rate and dynamic range of the ADC. One advantage of this approach is the cost reduction due to elimination of external components, but the drawback is, in general, increased power consumption. The increased dynamic range requirement of the ADC is due to the higher interferer energy (relative to the desired signal) caused by the relaxed front-end filter.
Moreover, high linearity is needed in order to keep intermodulation products out of the desired frequency band. For example, in GSM systems, more than 80 dB is needed in a 135 KHz band and, in 3rd generation wireless systems, nearly 80 dB is needed in a 2 MHz bandwidth. Thus, the required ADC design is very challenging, and disadvantageously consumes large amounts of power. Another disadvantage of direct conversion architectures is that, because the interferers are converted into digital format together with the desired signal, any gain provided by automatic gain control (AGC) is also applied to the interferers.
It is therefore desirable to provide for attenuation of interfering frequency channels without the aforementioned disadvantages of the conventional approaches.
The invention incorporates switched capacitor filtering into the process of sampling the analog signal at the input of the ADC. Merging the switched capacitor filter with the ADC advantageously eliminates the need for a large, costly analog filter, while still avoiding complicated ADC design features described above.